Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/26/1997
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Application #:
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08728495
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Filing Dt:
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10/09/1996
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Inventors:
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CHING-FA YEH, JYH-NAN JENG
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Title:
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METHOD FOR FABRICATING A POLYSILICON TRANSISTOR HAVING A BURIED-GATE STRUCTURE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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SECTION 2 |
18 FL. 106 HO-PING E. ROAD |
TAIPEI, TAIWAN 106 |
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HITT CHWANG & GAINES, P.C. |
T. LING CHWANG, ESQ. |
225 UNIVERSITY PLAZA |
275 W. CAMPBELL ROAD |
RICHARDSON, TEXAS 75080 |
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