Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/07/1998
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Application #:
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08404702
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Filing Dt:
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03/15/1995
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Inventor:
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AKIO SHIGEEDA
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Title:
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MICROPROCESSOR UNIT HAVING A FIRST LEVEL WRITE-THROUGH CACHE MEMORY AND A SMALLER SECOND - LEVEL WRITE-BACK CACHE MEMORY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| P.O. BOX 655474 - M/S 219 |
| DALLAS, TEXAS 75265 |
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| JAMES P. HOLLANDER |
| P.O. BOX 655474 - M/S 219 |
| DALLAS, TEXAS 75265 |
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