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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
01/05/1999
Application #:
08876135
Filing Dt:
06/23/1997
Inventors:
TZU-YIH CHU, ABRAHAM C. MA
Title:
PROCESSOR MODULE WITH DUAL-BANK SRAM CACHE HAVING SHARED CAPACITORS AND R-C ELEMENTS INTEGRATED INTO THE MODULE SUBSTRATE
Assignment: 1
Reel/Frame:
008804/0828Recorded: 11/20/1997Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
06/17/1997
Exec Dt:
06/17/1997
Assignee:
1972 CONCOURSE DRIVE
SAN JOSE, CALIFORNIA 95131
Correspondent:
STUART T. AUVINEN
429 26TH AVE.
SANTA CRUZ, CA 95062
Assignment: 2
Reel/Frame:
021489/0554Recorded: 09/08/2008Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
09/05/2008
Assignee:
2079 NORTH CAPITOL AVENUE
SAN JOSE, CALIFORNIA 95132
Correspondent:
PATRICK T. BEVER
2099 GATEWAY PLACE, SUITE 320
SAN JOSE, CA 95110

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