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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
04/06/1999
Application #:
08912326
Filing Dt:
08/18/1997
Inventor:
BING-YUE TSUI
Title:
METHOD FOR MAKING STACKED AND BORDERLESS VIA STRUCTURES FOR MULTILEVEL METAL INTERCONNECTIONS ON SEMICONDUCTOR SUBSTRATES
Assignment: 1
Reel/Frame:
008748/0628Recorded: 08/18/1997Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
07/23/1997
Assignee:
195 SEC. 4, CHUNG HSING RD.
CHUTUNG, HSINCHU, TAIWAN R.O.C
Correspondent:
GEORGE O. SAILE
20 MCINTOSH DRIVE
POUGHKEEPSIE, NY 12603

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