Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/10/1999
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Application #:
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08611087
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Filing Dt:
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03/05/1996
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Inventors:
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SOUICHI KOBAYASHI, YUKIHIKO SHIMAZU, TOSHIO KISHI
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Title:
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MOS INTEGRATED CIRCUIT WITH LOW POWER CONSUMPTION
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| CHIYODA-KU |
| 2-3, MARUNOUCHI 2-CHOME |
| TOKYO, JAPAN 100 |
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| BURNS, DOANE, SWECKER & MATHIS, L.L.P. |
| PLATON N. MANDROS |
| POST OFFICE BOX 1404 |
| ALEXANDRIA, VIRGINIA 22313-1404 |
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