Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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03/14/2000
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Application #:
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09184342
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Filing Dt:
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11/02/1998
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Inventors:
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HAO-CHIEH LIU, FU-LIANG YANG, WAN-YIH LIEN, TZU-SHIH YEN
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Title:
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METHOD FOR SIMULTANEOUSLY FABRICATING CAPACITOR STRUCTURES, FOR GIGA-BIT DRAM CELLS, AND PERIPHERAL INTERCONNECT STRUCTURES, USING A DUAL DAMASCENE PROCESS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SCIENCE-BASED INDUSTRIAL PARK |
| 123, PARK AVE. - 3RD |
| HSIN-CHU, TAIWAN R.O.C |
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| GEORGE O. SAILE |
| 20 MCINTOSH DRIVE |
| POUGHKEEPSIE, NY 12603 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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| THOMAS, KAYDEN, HORSTEMEYER & RISLEY |
| 600 GALLERIA PKWY |
| SUITE 1500 |
| ATLANTA, GA 30339 |
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