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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
6201410
Issue Dt:
03/13/2001
Application #:
09374470
Filing Dt:
08/13/1999
Inventors:
BERNARD J. NEW, STEVEN P. YOUNG, SHEKHAR BAPAT, KAMAL CHAUDHARY, TREVOR J. BAUER et al
Title:
WIDE LOGIC GATE IMPLEMENTED IN AN FPGA CONFIGURABLE LOGIC ELEMENT
Assignment: 1
Reel/Frame:
024424/0428Recorded: 05/22/2010Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
YOUNG, STEVEN P.
Exec Dt:
02/26/1997
CHAUDHARY, KAMAL
Exec Dt:
02/26/1997
BAUER, TREVOR J.
Exec Dt:
02/26/1997
Assignee:
XILINX, INC.
2100 LOGIC DRIVE
SAN JOSE, CALIFORNIA 95124
Correspondent:
XILINX, INC.
2100 LOGIC DRIVE
ATTN: LEGAL DEPARTMENT
SAN JOSE, CA 95124
Assignment: 2
Reel/Frame:
010182/0153Recorded: 08/13/1999Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
NEW, BERNARD J.
Exec Dt:
08/11/1999
YOUNG, STEVEN P.
Exec Dt:
08/11/1999
BAPAT, SHEKHAR
Exec Dt:
08/12/1999
CHAUDHARY, KAMAL
Exec Dt:
08/11/1999
BAUER, TREVOR J.
Exec Dt:
08/12/1999
IWANCZUK, ROMAN
Exec Dt:
08/11/1999
Assignee:
XILINX, INC.
2100 LOGIC DRIVE
SAN JOSE, CALIFORNIA 95124
Correspondent:
XILINX, INC.
LOIS D. CARTIER
2100 LOGIC DRIVE
SAN JOSE, CALIFORNIA 95124

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