Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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04/10/2001
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Application #:
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09081621
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Filing Dt:
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05/20/1998
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Inventors:
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KOJI INOUE, IZURU NAGAHARA, HIROKAZU SAWADA
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Title:
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SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DESIGNING THE SAME
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-35 KITASHINAGAWA 6-CHOME, SHINAGAWA-KU |
| TOKYO, JAPAN |
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| RADER FISHMAN & GRAUER |
| RONALD P. KANANEN, ESQ. |
| SUITE 501 |
| 1233 20TH STREET, NW |
| WASHINGTON, D.C.20036 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SHINAGAWA-KU |
| 7-35 KITASHINAGAWA 6-CHOME |
| TOKYO, JAPAN |
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| RADER, FISHMAN & GRAUER |
| RONALD P. KANANEN, ESQ. |
| 1233 20TH STREET, N.W. |
| SUITE 501 |
| WASHINGTON, D.C. 20036 |
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