Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/28/2001
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Application #:
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09591846
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Filing Dt:
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06/12/2000
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Inventors:
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Chie-Chi Chen, Sheng-Liang Pan
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Title:
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Method of reducing the roughness of a gate insulator layer after exposure of the gate insulator layer to a threshold voltage implantation procedure
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SCIENCE-BASED INDUSTRIAL PARK |
| 121 PARK AVE. 3 |
| HSIN-CHU, TAIWAN R.O.C |
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| GEORGE O. SAILE |
| STEPHEN B. ACKERMAN |
| 20 MCINTOSH DRIVE |
| POUGHKEEPSIE NY 12603 |
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