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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
09/11/2001
Application #:
09629133
Filing Dt:
07/31/2000
Inventor:
Kevin J. Nowka
Title:
Method and apparatus for reducing leakage in dynamic silicon-on-insulator logic circuits
Assignment: 1
Reel/Frame:
011017/0689Recorded: 07/31/2000Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
07/19/2000
Assignee:
NEW ORCHARD ROAD
ARMONK, NEW YORK 10504
Correspondent:
IBM CORPORATION
INTELLECTUAL PROPERTY LAW
CASIMER K. SALYS, ESQ.
11400 BURNET ROAD, ZIP 4054
AUSTIN, TEXAS 78758

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