Patent Assignment Abstract of Title
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Total Assignments:
4
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Patent #:
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Issue Dt:
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09/18/2001
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Application #:
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09603119
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Filing Dt:
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06/22/2000
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Inventors:
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Om P. Agrawal, Bradley A. Sharpe-Geisler, Giap H. Tran, Herman M. Chang
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Title:
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Methods for configuring FPGA's having variable grain blocks and shared logic for providing time-shared access to interconnect resources
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Assignment:
1
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MERGER (SEE DOCUMENT FOR DETAILS).
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| 5555 NE MOORE COURT |
| HILLSBORO, OREGON 97124 |
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| MARK L. BECKER |
| 5555 NE MOORE COURT |
| HILLSBORO, OR 97124 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 5555 NE MOORE CT |
| HILLSBORO, OREGON 97124 |
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| LATTICE SEMICONDUCTOR CORP. |
| MARK L. BECKER |
| 55555 NE MOORE CT |
| HILLSBORO, OR 97124 |
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Assignment:
3
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SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
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| 520 MADISON AVENUE |
| NEW YORK, NEW YORK 10022 |
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| PROSKAUER ROSE LLP |
| ONE INTERNATIONAL PLACE |
| BOSTON, MA 02110 |
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Assignment:
4
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RELEASE BY SECURED PARTY (SEE DOCUMENT FOR DETAILS).
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| 5555 NE MOORE CT |
| HILLSBORO, OREGON 97124 |
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| 5555 NE MOORE CT |
| HILLSBORO, OREGON 97124 |
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| 5555 NE MOORE CT |
| HILLSBORO, OREGON 97124 |
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| 5555 NE MOORE CT |
| HILLSBORO, OREGON 97124 |
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| URMILA KARANDIKAR |
| 139 TOWNSEND STREET SUITE 150 |
| SAN FRANCISCO, CA 94107 |
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