Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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12/25/2001
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Application #:
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09052152
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Filing Dt:
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03/31/1998
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Publication #:
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Pub Dt:
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09/20/2001
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Inventors:
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HIROYUKI AKATSU, SOICHI NADAHARA, TAKASHI NAKAO, SEIKO YOSHIDA
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Title:
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE INCLUDING A SEAMLESS SHALLOW TRENCH ISOLATION STEP
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| BANNER & WITCOFF, LTD. |
| JOSEPH M. POTENZA |
| 11TH FLOOR |
| 1001 G STREET, N.W. |
| WASHINGTON, DC 20001-4597 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 72 HORIKAWA-CHO, SAIWA-KU |
| KAWASAKI-SHI, JAPAN |
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| BANNER & WITCOFF, LTD. |
| JOSEPH M. POTENZA |
| 1001 G STREET, N.W. |
| 11TH FLOOR |
| WASHINGTON, D.C. 20001-4597 |
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