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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
07/16/2002
Application #:
09413493
Filing Dt:
10/06/1999
Inventor:
FUMINORI MASUKAWA
Title:
INTEGRATED CIRCUIT LAYOUT DESIGNING SYSTEM AND POWER SOURCE ELIMINATING METHOD TO BE EMPLOYED IN THE SAME USING ARRANGING POWER BLOCKS
Assignment: 1
Reel/Frame:
011508/0043Recorded: 02/05/2001Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
12/13/2000
Assignee:
7-1, SHIBA 5-CHOME MINATO-KU
TOKYO, JAPAN
Correspondent:
FOLEY & LARDNER
DAVID A. BLUMENTHAL
3000 K STREET, N.W., SUITE 500
WASHINGTON HARBOUR
WASHINGTON, D.C. 20007-5109

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