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Patent Assignment Abstract of Title

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Total Assignments: 1

Patent #:	6451687	Issue Dt:	09/17/2002	Application #:	09721898	Filing Dt:	11/24/2000
Inventors:	John Sudijono, Juan Boon Tan, Edwin Goh, Alan Cuthbertson, Arthur Ang, Feng Chen, Qiong Li et al
Title:	INTERMETAL DIELECTRIC LAYER FOR INTEGRATED CIRCUITS

Assignment: 1

Reel/Frame:

011351/0978

Recorded: 11/24/2000

Pages: 6

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

LIU, HUANG

Exec Dt:

11/15/2000

SUDIJONO, JOHN

Exec Dt:

11/14/2000

TAN, JUAN BOON

Exec Dt:

11/07/2000

GOH, EDWIN

Exec Dt:

11/15/2000

CUTHBERTSON, ALAN

Exec Dt:

11/14/2000

ANG, ARTHUR

Exec Dt:

11/13/2000

CHEN, FENG

Exec Dt:

11/07/2000

LI, QIONG

Exec Dt:

11/13/2000

CHEW, PETER

Exec Dt:

11/12/2000

Assignees:

CHARTERED SEMICONDUCTOR MANUFACTURING LTD.

60 WOODLANDS INDUSTRIAL PARK D, STREET 2

SINGAPORE 738406, SINGAPORE

LUCENT TECHNOLOGIES INC.

555 UNION BOULEVARD

ALLENTOWN, PENNSYLVANIA 18103

Correspondent:

THE LAW OFFICES OF MIKIO ISHIMARU

MIKIO ISHIMARU

1046 PINENUT COURT

SUNNYVALE, CA 94087

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