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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
6649525
Issue Dt:
11/18/2003
Application #:
10050485
Filing Dt:
01/16/2002
Inventors:
Khoi A. Phan, Jeffrey Erhardt, Jerry Cheng, Richard J. Bartlett, Anthony P. Coniglio et al
Title:
METHODS AND SYSTEMS FOR CONTROLLING RESIST RESIDUE DEFECTS AT GATE LAYER IN A SEMICONDUCTOR DEVICE MANUFACTURING PROCESS
Assignment: 1
Reel/Frame:
012503/0291Recorded: 01/16/2002Pages: 12
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
PHAN, KHOI A.
Exec Dt:
08/17/2001
ERHARDT, JEFFREY
Exec Dt:
07/26/2001
CHENG, JERRY
Exec Dt:
07/27/2001
BRADWAY, CAROL M.
Exec Dt:
10/02/2001
MAZUR, MARTIN
Exec Dt:
09/27/2001
BARTLETT, RICHARD J.
Exec Dt:
10/15/2001
BRADWAY, CAROL M.
Exec Dt:
10/02/2001
GRUNDKE, WOLFRAM
Exec Dt:
09/27/2001
SUTTON, DANIEL E.
Exec Dt:
11/01/2001
Assignee:
ADVANCED MICRO DEVICES
ONE AMD PLACE
SUNNYVALE, CALIFORNIA 94088
Correspondent:
AMIN & TUROCY, LLP
HIMANSHU S. AMIN
1900 E. 9TH STREET, 24TH FLOOR
NATIONAL CITY CENTER
CLEVELAND, OHIO 44114

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