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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
03/23/2004
Application #:
10279428
Filing Dt:
10/24/2002
Inventor:
Deepak Sabharwal
Title:
SEMICONDUCTOR MEMORY WITH MULTIPLE TIMING LOOPS
Assignment: 1
Reel/Frame:
013427/0331Recorded: 10/24/2002Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
10/23/2002
Assignee:
46501 LANDING PARKWAY
FREMONT, CALIFORNIA 94538
Correspondent:
DANAMRAJ & YOUST, P.C.
SHREEN K. DANAMRAJ
12900 PRESTON ROAD
SUITE 1200, LB-15
DALLAS, TX 75230-1328
Assignment: 2
Reel/Frame:
025105/0907Recorded: 10/08/2010Pages: 57
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Assignee:
700 EAST MIDDLEFIELD ROAD
MOUNTAIN VIEW, CALIFORNIA 94043
Correspondent:
FENWICK & WEST LLP
801 CALIFORNIA ST
ATTN MICHAEL W. FARN
MOUNTAIN VIEW, CA 94041

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