Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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04/20/2004
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Application #:
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09412328
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Filing Dt:
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10/05/1999
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Publication #:
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Pub Dt:
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06/05/2003
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Inventor:
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YUICHI SATO
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Title:
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STATIC RANDOM ACCESS MEMORY AND SEMICONDUCTOR DEVICE USING MOS TRANSISTORS HAVING CHANNEL REGION ELECTRICALLY CONNECTED WITH GATE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 22-22, NAGAIKE-CHO, ABENO-KU |
| OSAKA, JAPAN |
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| MORRISON & FOESTER LLP |
| BARRY E. BRETSCHNEIDER |
| 2000 PENNSYLVANIA AVENUE, N.W. |
| WASHINGTON, D.C. 20006-1888 |
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