Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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07/12/2005
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Application #:
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09853998
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Filing Dt:
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05/12/2001
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Publication #:
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Pub Dt:
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01/31/2002
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Inventor:
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Tsuruto Matsui
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Title:
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PATTERN GENERATOR FOR SEMICONDUCTOR TEST SYSTEM
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| SHINJUKU-KU |
| NS BUILDING, 4-1, NISHI-SHINJUKU 2-CHOME |
| TOKYO, JAPAN |
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| MURAMATSU & ASSOCIATES |
| YASUO MURAMATSU |
| 7700 IRVINE CENTER DRIVE |
| SUITE 225 |
| IRVINE, CA 92618 |
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