Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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11/22/2005
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Application #:
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10800711
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Filing Dt:
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03/16/2004
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Publication #:
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Pub Dt:
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10/28/2004
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Inventors:
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Akio Hirata, Toshiyuki Moriwaki, Tetsurou Toubou, Nana Okamoto, Mitsuaki Hayashi
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Title:
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SEMICONDUCTOR MEMORY AND SEMICONDUCTOR INTEGRATED CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1006 OAZA KADOMA |
KADOMA-SHI, |
OSAKA, JAPAN 571-8501 |
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MCDERMOTT, WILL & EMERY |
600 13TH STREET, N.W. |
WASHINGTON, D.C. 20005-3096 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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10-23, SHINYOKOHAMA 2-CHOME, KOHOKU-KU, YOKOHAMA-SHI |
KANAGAWA, JAPAN 2220033 |
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PANASONIC CORPORATION |
2-1-61, SHIROMI, CHUO-KU |
7F OBP PANASONIC TOWER |
OSAKA, 540-6207 JAPAN |
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