Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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05/09/2006
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Application #:
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10300348
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Filing Dt:
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11/20/2002
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Publication #:
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Pub Dt:
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05/20/2004
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Inventor:
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James Richard Terrell II
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Title:
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SYSTEM CLOCK POWER MANAGEMENT FOR CHIPS WITH MULTIPLE PROCESSING MODULES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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3255 SCOTT BOULEVARD, BUILDING #1 |
SANTA CLARA, CALIFORNIA 95054 |
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GERALD T. SEKIMURA |
153 TOWNSEND STREET, SUITE 800 |
SAN FRANCISCO, CA 94107 |
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Assignment:
2
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MERGER (SEE DOCUMENT FOR DETAILS).
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2701 SAN TOMAS EXPRESSWAY, M/S: 16 |
SANTA CLARA, CALIFORNIA 95050 |
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MURABITO, HAO & BARNES LLP |
2 N. MARKET STREET |
THIRD FLOOR |
SAN JOSE, CA 95113 |
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