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Patent Assignment Abstract of Title

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Total Assignments: 1

Patent #:	7047510	Issue Dt:	05/16/2006	Application #:	10422535	Filing Dt:	04/23/2003
Inventors:	Manu Chopra, Xiaoqun Du, Ronald H. Hardin, Alok Jain, Kavita Ravi, Robert P. Kurshan et al
Title:	METHOD AND SYSTEM FOR PARTITIONING AN INTEGRATED CIRCUIT DESIGN

Assignment: 1

Reel/Frame:

014005/0831

Recorded: 04/23/2003

Pages: 31

Conveyance:

ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).

Assignors:

CHOPRA, MANU

Exec Dt:

03/05/2003

DU, XIAOQUUN

Exec Dt:

02/24/2003

HARDIN, RONALD H.

Exec Dt:

04/08/2003

JAIN, ALOK

Exec Dt:

03/05/2003

KURSHAN, ROBERT P.

Exec Dt:

02/24/2003

MAHAJAN, PRATIK

Exec Dt:

03/05/2003

PRAKASH, RAVI

Exec Dt:

03/05/2003

RAVI, KAVITA

Exec Dt:

02/24/2003

Assignee:

CADENCE DESIGN SYSTEMS, INC.

2655 SEELY AVENUE

SAN JOSE, CALIFORNIA 95134

Correspondent:

BINGHAM MCCUTCHEN LLP

PETER C. MEI

THREE EMBARCADERO, SUITE 1800

SAN FRANCISCO, CA 94111-4067

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