Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/30/2007
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Application #:
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11054479
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Filing Dt:
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02/09/2005
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Publication #:
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Pub Dt:
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08/10/2006
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Inventors:
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Yuen H. Chan, Ryan T. Freese, Antonio R. Pelella, Arthur D. Tuminaro et al
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Title:
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GLOBAL BIT LINE RESTORE TIMING SCHEME AND CIRCUIT
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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NEW ORCHARD ROAD |
ARMONK, NEW YORK 10504 |
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IBM CORPORATION |
LYNN L. AUGSPURGER |
INTELLECTUAL PROPERTY LAW |
2455 SOUTH ROAD, P386 |
POUGHKEEPSIE, NY 12601 |
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