Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
11/27/2007
|
Application #:
|
11152472
|
Filing Dt:
|
06/14/2005
|
|
Publication #:
|
|
Pub Dt:
|
12/14/2006
| | | | |
|
Inventors:
|
Chun-Yao Wang, Jan-An Hsieh, Shih-Chieh Wu
|
|
Title:
|
METHOD FOR VERIFYING A CIRCUIT DESIGN BY ASSIGNING NUMERICAL VALUES TO INPUTS OF THE CIRCUIT DESIGN
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| NO. 101, SEC. 2, KUANG FU ROAD |
| HSINCHU 300, TAIWAN |
|
|
|
|
| ANDREW W. CHU |
| 412 MAIN ST., 7TH FLOOR |
| HOUSTON, TX 77002 |
|
|
Search Results as of:
05/16/2024 02:19 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
