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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
02/17/2009
Application #:
11279240
Filing Dt:
04/10/2006
Publication #:
Pub Dt:
10/11/2007
Inventors:
Chien-Jung Chiu, Hsing-Ya Huo, Tsung-Yu Lee
Title:
SYSTEMS AND METHODS FOR REDUCING TESTING TIMES ON INTEGRATED CIRCUIT DIES
Assignment: 1
Reel/Frame:
017497/0808Recorded: 04/19/2006Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/06/2006
Exec Dt:
04/04/2006
Exec Dt:
04/03/2006
Assignee:
NO. 8, LI-HSIN RD. 6
SCIENCE-BASED INDUSTRIAL PARK
HSINCHU, TAIWAN
Correspondent:
BRIAN C. MCCORMACK
2001 ROSS AVE., SUITE 2300
DALLAS, TX 75201

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