Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/01/2009
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Application #:
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11158978
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Filing Dt:
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06/22/2005
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Publication #:
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Pub Dt:
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01/12/2006
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Inventors:
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Seung-Hwan Lee, Dong-Suk Shin, Hwa-Sung Rhee, Tetsuji Ueno, Ho Lee
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Title:
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METHOD OF FORMING MOS TRANSISTOR HAVING FULLY SILICIDED METAL GATE ELECTRODE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 416, MAETAN-DONG |
| YEONGTONG-GU |
| SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF |
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| STEVEN M. MILLS |
| MILLS & ONELLO LLP |
| ELEVEN BEACON STREET, 605 |
| BOSTON, MASSACHUSETTS 02108 |
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