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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
02/23/2010
Application #:
10955067
Filing Dt:
09/30/2004
Publication #:
Pub Dt:
04/06/2006
Inventor:
Vishnu Govind Kamat
Title:
METHOD AND SYSTEM FOR SEMICONDUCTOR DESIGN HIERARCHY ANALYSIS AND TRANSFORMATION
Assignment: 1
Reel/Frame:
015867/0400Recorded: 09/30/2004Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
09/30/2004
Assignee:
1754 TECHNOLOGY DRIVE
SUITE 117
SAN JOSE, CALIFORNIA 95110
Correspondent:
HOUSTON ELISEEVA, LLP
J. GRANT HOUSTON
4 MILITIA DRIVE, SUITE 4
LEXINGTON, MA 02421
Assignment: 2
Reel/Frame:
021122/0462Recorded: 06/19/2008Pages: 8
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
06/04/2008
Assignee:
2655 SEELY AVENUE
SAN JOSE, CALIFORNIA 95134-1931
Correspondent:
SHEPPARD MULLIN RICHTER & HAMPTON LLP
333 SOUTH HOPE STREET, 48TH FLOOR
LOS ANGELES, CA 90071-1448

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