Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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01/17/2012
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Application #:
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11498472
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Filing Dt:
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08/02/2006
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Inventors:
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Amir Lehavot, Vinaya Kumar Singh, Joezac John Zachariah, Jose Barandiaran et al
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Title:
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AUTOMATED DEBUGGING METHOD AND SYSTEM FOR OVER-CONSTRAINED CIRCUIT VERIFICATION ENVIRONMENT
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Assignment:
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2655 SEELY AVENUE |
SAN JOSE, CALIFORNIA 95134 |
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MCDERMOTT WILL & EMERY LLP |
18191 VON KARMAN AVENUE |
SUITE 500 |
IRVINE, CA 92612-7108 |
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