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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
08/07/2012
Application #:
12715918
Filing Dt:
03/02/2010
Publication #:
Pub Dt:
06/30/2011
Inventors:
Kenneth S. Stevens, Yang Xu
Title:
METHOD AND SYSTEM FOR SYNTHESIZING RELATIVE TIMING CONSTRAINTS ON AN INTEGRATED CIRCUIT DESIGN TO FACILITATE TIMING VERIFICATION
Assignment: 1
Reel/Frame:
024015/0509Recorded: 03/02/2010Pages: 2
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
03/01/2010
Exec Dt:
03/01/2010
Assignee:
270 SOUTH 1400 EAST
SALT LAKE CITY, UTAH 84112
Correspondent:
DILLON & YUDELL LLP
8911 N. CAPITAL OF TEXAS HWY.
SUITE 2110
AUSTIN, TX 78759
Assignment: 2
Reel/Frame:
024942/0386Recorded: 09/07/2010Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
08/26/2010
Exec Dt:
08/26/2010
Assignee:
615 ARAPEEN DRIVE
SUITE 310
SALT LAKE CITY, UTAH 84108
Correspondent:
DILLON & YUDELL LLP
8911 N. CAPITAL OF TEXAS HWY.
SUITE 2110
AUSTIN, TX 78759

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