Patent Assignment Abstract of Title
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Total Assignments:
3
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Patent #:
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Issue Dt:
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02/25/2014
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Application #:
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13112075
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Filing Dt:
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05/20/2011
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Publication #:
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Pub Dt:
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12/01/2011
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Inventors:
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Andrew Ritenour, David C. Sheridan
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Title:
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SELF-ALIGNED SEMICONDUCTOR DEVICES WITH REDUCED GATE-SOURCE LEAKAGE UNDER REVERSE BIAS AND METHODS OF MAKING
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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201 RESEARCH BLVD. |
STARKVILLE, MISSISSIPPI 39759 |
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MICHAIAH COPP |
1603 NORTH SPRINGWOOD DRIVE |
SUITE 820 |
WASHINGTON, DC 20005 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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1401 LIVINGSTON LANE |
JACKSON, MISSISSIPPI 39213 |
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MICHAIAH COPP |
1333 H STREET, NW |
SUITE 820 |
WASHINGTON, DC 20005 |
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Assignment:
3
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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5245 HELLYER AVENUE |
SAN JOSE, CALIFORNIA 94538 |
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POWER INTEGRATIONS, INC. |
C/O CPA GLOBAL |
P. O. BOX 52050 |
MINNEAPOLIS, MN 55402 |
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