Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/29/2015
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Application #:
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14230779
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Filing Dt:
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03/31/2014
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Publication #:
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Pub Dt:
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09/25/2014
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Inventors:
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Tzu-Yen Hsieh, Ming-Ching Chang, Chao-Cheng Chen, Yuan-Sheng Huang, Ming-Chia Tai
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Title:
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Method of Semiconductor Integrated Circuit Fabrication
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NO. 8, LI-HSIN RD. 6 |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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| HAYNES AND BOONE, LLP - IP SECTION |
| 2323 VICTORY AVENUE |
| SUITE 700 |
| DALLAS, TX 75219 |
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Assignment:
2
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CORRECTIVE ASSIGNMENT TO CORRECT THE SECOND ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 033171 FRAME: 0895. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
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| NO. 8, LI-HSIN RD. 6 |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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| HAYNES AND BOONE, LLP - IP SECTION |
| 2323 VICTORY AVENUE |
| SUITE 700 |
| DALLAS, 75219 UNITED STATES |
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