Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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05/10/2016
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Application #:
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13172606
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Filing Dt:
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06/29/2011
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Publication #:
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Pub Dt:
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06/28/2012
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Inventor:
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VENKATA NARAYANAN SRINIVASAN
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Title:
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INTEGRATED DEVICE TEST CIRCUITS AND METHODS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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PLOT N. 1, KNOWLEDGE PARK III |
GREATER NOIDA, INDIA 201308 |
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STMICROELECTRONICS, INC. |
MAIL STATION 2346 |
750 CANYON DRIVE, SUITE 300 |
COPPELL, TEXAS 75019 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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WTC SCHIPHOL AIRPORT |
SCHIPHOL BOULEVARD 265 |
SCHIPHOL, NETHERLANDS 1118 BH |
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SEED IP LAW GROUP |
701 FIFTH AVENUE |
SUITE 5400 |
SEATTLE, WA 98104 |
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