Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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08/02/2016
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Application #:
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14752206
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Filing Dt:
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06/26/2015
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Inventors:
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Amit DHURIA, Naresh KUMAR, Prashant SETHIA, Jeannette SUTHERLAND, Shashank TRIPATHI
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Title:
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HIGH PERFORMANCE STATIC TIMING ANALYSIS SYSTEM AND METHOD FOR INPUT/OUTPUT INTERFACES
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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2655 SEELY AVENUE |
SAN JOSE, CALIFORNIA 95134 |
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KAYE SCHOLER LLP/CADENCE |
TWO PALO ALTO SQUARE, SUITE 400 |
3000 EL CAMINO REAL |
PALO ALTO, CA 94306 |
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