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Patent Assignment Abstract of Title
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Total Assignments: 3
Patent #:
Issue Dt:
09/13/2016
Application #:
14635960
Filing Dt:
03/02/2015
Publication #:
Pub Dt:
10/29/2015
Inventors:
Maher Amer, Michael L. Takefman, Riccardo Badalone
Title:
System and Method of Interfacing Co-Processors and Input/Output Devices via a Main Memory System
Assignment: 1
Reel/Frame:
036021/0691Recorded: 07/08/2015Pages: 3
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
04/11/2014
Exec Dt:
04/11/2014
Exec Dt:
04/14/2014
Assignee:
80 ABERDEEN STREET
SUITE 401
OTTAWA, CANADA K1S 5R5
Correspondent:
SMART & BIGGAR
P.O. BOX 2999, STATION D.
900-55 METCALFE STREET
OTTAWA, K1P 5Y6 CANADA
Assignment: 2
Reel/Frame:
037335/0101Recorded: 12/19/2015Pages: 13
Conveyance:
SECURITY INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
02/17/2015
Assignee:
200 CLARENDON ST., 28TH FL
BOSTON, MASSACHUSETTS 02116
Correspondent:
DIANA SANCHEZ BENTZ
VLP LAW GROUP LLP
GILROY, CA 95020
Assignment: 3
Reel/Frame:
047126/0468Recorded: 10/10/2018Pages: 11
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignor:
Exec Dt:
10/04/2018
Assignee:
1050 ENTERPRISE WAY #700
SUNNYVALE, CALIFORNIA 94089
Correspondent:
TAMMY FRIEDMAN
1050 ENTERPRISE WAY #700
SUNNYVALE, CA 94089

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