Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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01/17/2017
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Application #:
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14810428
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Filing Dt:
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07/27/2015
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Publication #:
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Pub Dt:
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02/02/2017
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Inventors:
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Jason Zse-Cherng Lin, Shauh-Teh Juang
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Title:
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System And Method For Discovering Unknown Problematic Patterns In Chip Design Layout For Semiconductor Manufacturing
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 5F-1, NO. 100, SEC. 1, JIAFENG 11TH RD. |
| ZHUBEI CITY |
| HSINCHU COUNTY, TAIWAN 30273 |
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| LIN & ASSOCIATES INTELLECTUAL PROPERTY |
| POST OFFICE BOX 2339 |
| SARATOGA, CA 95070-0339 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 3050 BOWERS AVENUE |
| SANTA CLARA, CALIFORNIA 95054 |
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| PATTERSON + SHERIDAN LLP |
| 24 GREENWAY PLAZA |
| SUITE 1600 |
| HOUSTON, TX 77046 |
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