Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
03/07/2017
|
Application #:
|
14559420
|
Filing Dt:
|
12/03/2014
|
|
Inventors:
|
Keith DENNISON, Donald J. O'RIORDAN, Vuk BORICH
|
|
Title:
|
SYSTEMS AND METHODS FOR VIEWING ANALOG SIMULATION CHECK VIOLATIONS IN AN ELECTRONIC DESIGN AUTOMATION FRAMEWORK
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 2655 SEELY AVENUE |
| BUILDING 5 |
| SAN JOSE, CALIFORNIA 95134 |
|
|
|
|
| CADENCE DESIGN SYSTEMS, INC. - KENYON |
| C/O KENYON & KENYON LLP |
| 1801 PAGE MILL ROAD, SUITE 210 |
| PALO ALTO, CA 94304-1216 |
|
|
Search Results as of:
06/20/2024 05:30 AM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
