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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
9659896
Issue Dt:
05/23/2017
Application #:
15052105
Filing Dt:
02/24/2016
Publication #:
20160172329
Pub Dt:
06/16/2016
Inventors:
Chih-Hao Chang, Tsung-Hsien Chiang, Tin-Hao Kuo, Guan-Yu Chen, Wei Sen Chang, Hao-Yi Tsai et al
Title:
Interconnect Structures for Wafer Level Package and Methods of Forming Same
Assignment: 1
Reel/Frame:
038552/0708Recorded: 05/11/2016Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
CHANG, CHIH-HAO
Exec Dt:
03/16/2016
CHIANG, TSUNG-HSIEN
Exec Dt:
03/10/2016
CHEN, GUAN-YU
Exec Dt:
03/16/2016
CHANG, WEI SEN
Exec Dt:
03/18/2016
KUO, TIN-HAO
Exec Dt:
03/18/2016
TSAI, HAO-YI
Exec Dt:
03/11/2016
YU, CHEN-HUA
Exec Dt:
04/11/2016
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK
HSIN-CHU, TAIWAN 300-77
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON RD., SUITE 1000
DALLAS, TX 75252
Assignment: 2
Reel/Frame:
040922/0101Recorded: 12/14/2016Pages: 6
Conveyance:
CORRECTIVE ASSIGNMENT TO CORRECT THE TITLE INSIDE THE ASSIGNMENT DOCUMENT PREVIOUSLY RECORDED AT REEL: 038552 FRAME: 0708. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Assignors:
CHANG, CHI-HAO
Exec Dt:
11/15/2016
CHIANG, TSUNG-HSIEN
Exec Dt:
11/15/2016
CHEN, GUAN-YU
Exec Dt:
11/15/2016
CHANG, WEI SEN
Exec Dt:
11/15/2016
KUO, TIN-HAO
Exec Dt:
11/17/2016
TSAI, HAO-YI
Exec Dt:
11/17/2016
YU, CHEN-HUA
Exec Dt:
11/17/2016
Assignee:
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
NO. 8, LI-HSIN RD. 6, SCIENCE-BASED INDUSTRIAL PARK
HSIN-CHU, TAIWAN 300-77
Correspondent:
SLATER MATSIL, LLP
17950 PRESTON RD., SUITE 1000
DALLAS, TX 75252

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