Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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09/12/2017
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Application #:
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15116441
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Filing Dt:
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08/03/2016
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Publication #:
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Pub Dt:
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06/15/2017
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PCT #:
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US2015014324
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Inventors:
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Amit LAL, Justin C. KUO
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Title:
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PIEZOELECTRIC AND LOGIC INTEGRATED DELAY LINE MEMORY
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 395 PINE TREE ROAD, SUITE 310 |
| ITHACA, NEW YORK 14850 |
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| BING AI |
| PERKINS COIE LLP |
| PO BOX 1247 |
| SEATTLE, WA 98111-1247 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 395 PINE STREET |
| SUITE 310 |
| ITHACA, NEW YORK 14850 |
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| BING AI |
| PERKINS COIE LLP |
| PO BOX 1247 |
| SEATTLE, WA 98111-1247 |
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