Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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12/19/2017
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Application #:
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15043912
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Filing Dt:
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02/15/2016
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Publication #:
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Pub Dt:
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06/09/2016
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Inventors:
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Kuan-Yu Lin, Chin-Her Chien, Ji-Jan Chen, Jung-Rung Jiang, Wei-Pin Changchien
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Title:
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MONOLITHIC STACKED INTEGRATED CIRCUITS WITH A REDUNDANT LAYER FOR REPAIRING DEFECTS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NO. 8, LI-HSIN RD. 6 |
| SCIENCE-BASED INDUSTRIAL PARK |
| HSIN-CHU, TAIWAN 300-77 |
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| HAYNES AND BOONE, LLP. |
| 2323 VICTORY AVENUE |
| SUITE 700 |
| DALLAS, TX 75219 |
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