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Patent Assignment Abstract of Title
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Total Assignments: 1
Patent #:
Issue Dt:
12/26/2017
Application #:
15188907
Filing Dt:
06/21/2016
Inventors:
Yu-Chi Cheng, Patrick Chuang, Jae-Hyeong Kim
Title:
SYSTEMS AND METHODS INVOLVING LOCK-LOOP CIRCUITS, CLOCK SIGNAL ALIGNMENT, PHASE-AVERAGING FEEDBACK CLOCK CIRCUITRY
Assignment: 1
Reel/Frame:
040673/0548Recorded: 12/19/2016Pages: 5
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
12/06/2016
Exec Dt:
12/12/2016
Exec Dt:
12/05/2016
Assignee:
1213 ELKO DRIVE
SUNNYVALE, CALIFORNIA 94089
Correspondent:
DLA PIPER LLP
2000 UNIVERSITY AVENUE
EAST PALO ALTO, CA 94303-2215

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