Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
2
|
|
Patent #:
|
NONE
|
Issue Dt:
|
|
Application #:
|
09731218
|
Filing Dt:
|
12/06/2000
|
|
Publication #:
|
|
Pub Dt:
|
06/07/2001
| | | | |
|
Inventor:
|
Yutaka Yoshizawa
|
|
Title:
|
METHOD AND APPARATUS FOR TESTING SEMICONDUCTOR INTEGRATED CIRCUIT WITH BURN-IN AND BIST TESTING CAPABILITIES
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 7-1, SHIBA 5-CHOME |
| MINATO-KU, JAPAN |
|
|
|
|
| HELFGOTT & KARAS, P.C. |
| AARON B. KARAS |
| EMPIRE STATE BUILDING |
| 60TH FLOOR |
| NEW YORK, NEW YORK,10118 |
|
|
|
Assignment:
2
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 1753 SHIMONUMABE |
| NAKAHARA-KU, KAWASAKI |
| KANAGAWA 211-8668, JAPAN |
|
|
|
|
| KATTEN MUCHIN ZAVIS ROSENMAN |
| IP DEPARTMENT 15TH FL. |
| 575 MADISON AVENUE |
| NEW YORK, NY 10022-2585 |
|
|
Search Results as of:
05/01/2024 09:29 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
