Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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12/14/2004
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Application #:
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09918739
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Filing Dt:
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07/31/2001
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Publication #:
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Pub Dt:
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11/29/2001
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Inventor:
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David J. Corisis
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Title:
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METHODS FOR LEADS UNDER CHIP IN CONVENTIONAL IC PACKAGE
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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8000 SOUTH FEDERAL WAY |
BOISE, IDAHO 83707 |
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SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
5005 E. MCDOWELL ROAD |
MAILDROP A700 |
PHOENIX, AZ 85008 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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C/O CITICO TRUSTEES (CAYMAN) LIMITED |
REGATTA OFFICE PARK, WEST BAY ROAD |
GRAND CAYMAN, CAYMAN ISLANDS Y1-1205 |
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SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC |
5005 E. MCDOWELL ROAD |
MAILDROP A700 |
PHOENIX, AZ 85008 |
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