Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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09876051
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Filing Dt:
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06/08/2001
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Publication #:
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Pub Dt:
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12/13/2001
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Inventor:
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Masaru Sanada
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Title:
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Logic determination device for semiconductor integrated device and logic determination method
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 7-1, SHIBA 5-CHOME, MINATO-KU |
| TOKYO, JAPAN |
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| MCGUIREWOODS LLP |
| MICHAEL E. WHITHAM, ESQ. |
| 1750 TYSONS BOULEVARD, SUITE 1800 |
| MCLEAN, VA 22102 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1753 SHIMOUMABE, NAKAHARA-KU, |
| KAWASAKI |
| KANAGAWA 211-8668, JAPAN |
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| WHITHAM, CURTIS & CHRISTOFFERSON, PC |
| MICHAEL E. WHITHAM |
| 11491 SUNSET HILLS ROAD-#340 |
| RESTON, VA 20190 |
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