Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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Issue Dt:
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08/05/2003
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Application #:
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09731327
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Filing Dt:
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12/05/2000
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Publication #:
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Pub Dt:
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06/06/2002
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Inventors:
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James Vinh, Robert S. Grondalski, Pranjal Srivastava, Ajay Naini
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Title:
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METHOD AND APPARATUS FOR REDUCTION OF NOISE SENSITIVITY IN DYNAMIC LOGIC CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| NAKAHARA-KU, KAWASAKI-SHI |
| 1-1 KAMIKODANAKA, 4-CHOME |
| KANAGAWA 211-8588, JAPAN |
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| FENWICK & WEST LLP |
| ALBERT C. SMITH |
| 2 PALO ALTO SQUARE |
| PALO ALTO, CA 94306 |
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Assignment:
2
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-1 KAMIKODANAKA, 4-CHOME NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA, JAPAN 211-8 |
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| FENWICK & WEST LLP |
| EDWARD A. VAN GIESON |
| 2 PALO ALTO SQUARE |
| PALO ALTO, CA 94306 |
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