Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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09/13/2005
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Application #:
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10073312
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Filing Dt:
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02/13/2002
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Publication #:
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Pub Dt:
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08/22/2002
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Inventors:
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Tetsuo Sasaki, Yousuke Nagao, Tatsuki Ishii, Itaru Matsumoto
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Title:
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DESIGN METHOD AND SYSTEM FOR ACHIEVING A MINIMUM MACHINE CYCLE FOR SEMIDUCTOR INTEGRATED CIRCUITS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 6, KANDA SURUGADAI 4-CHOME |
| CHIYODA-KU, TOKYO, JAPAN |
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| 456, SAKAI, NAKAI-MACHI |
| ASHIGARAKAMI-GUN, JAPAN |
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| 6-81, ONOE-CHO, NAKA-KU |
| YOKOHAMA, JAPAN |
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| MATTINGLY, STANGER & MALUR, P.C. |
| JOHN R. MATTINGLY |
| 1800 DIAGONAL ROAD, SUITE 370 |
| ALEXANDRIA, VIRGINIA 22314 |
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