Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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11/04/2003
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Application #:
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10230239
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Filing Dt:
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08/28/2002
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Publication #:
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Pub Dt:
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01/30/2003
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Inventor:
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Kim Carver Hardee
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Title:
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DATA BUS ARCHITECTURE FOR INTEGRATED CIRCUIT DEVICES HAVING EMBEDDED DYNAMIC RANDOM ACCESS MEMORY (DRAM) WITH A LARGE ASPECT RATIO PROVIDING REDUCED CAPACITANCE AND POWER REQUIREMENTS
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 1-7-1 KONAN, MINATO-KU |
| TOKYO, JAPAN 108-0075 |
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| DANIEL M. GURFINKEL |
| 120 SOUTH LASALLE STREET, SUITE 1400 |
| CHICAGO, IL 60603 |
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