Patent Assignment Abstract of Title
NOTE:Results display only for issued patents and published applications.
For pending or abandoned applications please consult USPTO staff.
|
Total Assignments:
1
|
|
Patent #:
|
|
Issue Dt:
|
01/09/2007
|
Application #:
|
10918421
|
Filing Dt:
|
08/16/2004
|
|
Publication #:
|
|
Pub Dt:
|
01/27/2005
| | | | |
|
Inventors:
|
Masatoshi Hasegawa, Shuichi Miyaoka, Hiroshi Akasaki, Masahiro Katayama
|
|
Title:
|
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE, METHOD OF TESTING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
|
|
|
Assignment:
1
|
|
|
|
|
|
|
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
|
|
|
|
|
|
|
|
|
| 6, KANDA SURUGADAI 4-CHOME |
| CHIYODA-KU, TOKYO, JAPAN |
|
|
|
| 22-1 JOSUIHONCHO 5-CHOME |
| KODAIRA-SHI, TOKYO, JAPAN |
|
|
|
|
| REED SMITH LLP |
| STANLEY P. FISHER |
| 3110 FAIRVIEW PARK DR., SUITE 1400 |
| FALLS CHURCH, VA 22042 |
|
|
Search Results as of:
05/03/2024 05:29 PM
If you have any comments or questions concerning the data displayed,
contact
PRD / Assignments at 571-272-3350. v.2.6
Web interface last modified:
August 25, 2017 v.2.6
|
