Patent Assignment Abstract of Title
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Total Assignments:
2
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Patent #:
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NONE
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Issue Dt:
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Application #:
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11214843
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Filing Dt:
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08/31/2005
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Publication #:
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Pub Dt:
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08/24/2006
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Inventor:
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Takashi Matsuura
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Title:
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Method and apparatus for evaluating coverage of circuit, and computer product
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Assignment:
1
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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| 19F, KASUMIGASEKI BLDG. |
| 2-5, KASUMIGASEKI 3-CHOME |
| CHIYODA-KU, TOKYO 100-6019, JAPAN |
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| STAAS & HALSEY LLP |
| H. J. STAAS |
| 1201 NEW YORK AVE., N.W. |
| SUITE 700 |
| WASHINGTON, D.C. 20005 |
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Assignment:
2
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CORRECTED COVER SHEET TO CORRECT ASSIGNEE NAME AND ADDRESS, PREVIOUSLY RECORDED AT REEL/FRAME 017258/0621 (ASSIGNMENT OF ASSIGNOR'S INTEREST)
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| 1-1, KAMIKODANAKA 4-CHOME |
| NAKAHARA-KU, KAWASAKI-SHI |
| KANAGAWA 211-8588, JAPAN |
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| STAAS & HALSEY LLP |
| ATTENTION: H.J. STAAS |
| 1201 NEW YORK AVENUE, N.W. |
| 7TH FLOOR |
| WASHINGTON, DC 20005 |
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