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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
10/13/2009
Application #:
11401806
Filing Dt:
04/10/2006
Publication #:
Pub Dt:
09/07/2006
Inventors:
Gene T. Sluss, Deepak D. Sherlekar, Tushar R. Gweewala
Title:
VARIOUS METHODS AND APPARATUSES TO PRESERVE A LOGIC STATE FOR A VOLATILE LATCH CIRCUIT
Assignment: 1
Reel/Frame:
017782/0461Recorded: 04/10/2006Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
08/23/2004
Exec Dt:
08/23/2004
Exec Dt:
08/17/2004
Assignee:
47100 BAYSIDE PARKWAY
FREMONT, CALIFORNIA 94538
Correspondent:
BLAKELY SOKOLOFF TAYLOR ET AL.
12400 WILSHIRE BLVD., 7TH FLR.
LOS ANGELES, CA 90025
Assignment: 2
Reel/Frame:
025105/0907Recorded: 10/08/2010Pages: 57
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Exec Dt:
09/02/2010
Assignee:
700 EAST MIDDLEFIELD ROAD
MOUNTAIN VIEW, CALIFORNIA 94043
Correspondent:
FENWICK & WEST LLP
801 CALIFORNIA ST
ATTN MICHAEL W. FARN
MOUNTAIN VIEW, CA 94041

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