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Patent Assignment Abstract of Title
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Total Assignments: 2
Patent #:
Issue Dt:
04/14/2009
Application #:
11517259
Filing Dt:
09/08/2006
Publication #:
Pub Dt:
01/25/2007
Inventors:
Seung-Man Shin, Seung-Jin Seo, You-Keun Han, Hui-Chong Shin, Jong-Geon Lee, Kyung-Hee Han
Title:
METHODS AND APPARATUSES FOR INTERFACING BETWEEN TEST SYSTEM AND MEMORY
Assignment: 1
Reel/Frame:
018289/0008Recorded: 09/08/2006Pages: 4
Conveyance:
ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
Assignors:
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Assignee:
416 MAETAN-DONG, YEONGTONG-GU
SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondent:
HARNESS, DICKEY & PIERCE, P.L.C.
P.O. BOX 8910
RESTON, VA 20195
Assignment: 2
Reel/Frame:
018409/0641Recorded: 10/12/2006Pages: 4
Conveyance:
RE-RECORD TO CORRECT THE NAME OF THE FOURTH ASSIGNOR, PREVIOUSLY RECORDED ON REEL 018289 FRAME 0008.
Assignors:
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Exec Dt:
08/23/2006
Assignee:
416 MAETAN-DONG, YEONGTONG-GU
SUWON-SI, GYEONGGI-DO, KOREA, REPUBLIC OF
Correspondent:
HARNESS, DICKEY & PIERCE, P.L.C.
P.O. BOX 8910
RESTON, VIRGINIA 20195

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