Patent Assignment Abstract of Title
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Total Assignments:
1
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Patent #:
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Issue Dt:
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10/26/2010
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Application #:
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11757349
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Filing Dt:
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06/02/2007
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Publication #:
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Pub Dt:
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01/17/2008
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Inventor:
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Shufan Chan
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Title:
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HIERARCHICAL ANALOG LAYOUT SYNTHESIS AND OPTIMIZATION FOR INTEGRATED CIRCUITS
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Assignment:
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ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).
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18000 STUDEBAKER ROAD, SUITE 700 |
CERRITOS, CALIFORNIA 90703 |
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WILLIAM E. ALFORD OF ORION LAW GROUP |
3 HUTTON CENTRE, SUITE 850 |
SANTA ANA, CA 92707 |
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